Lead High-Speed Verification Engineer – Pcie/Ucie
Clinical Role Overview
Hireroo Ltd is seeking a Lead Design Verification Engineer in Barcelona to lead functional verification of high-speed interface protocol blocks at IP and subsystem levels. The role blends hands-on verification with technical leadership across RTL, architecture, firmware and verification teams. You will architect and maintain UVM environments, own verification of PCIe/UCIe/Ser Des, and act as protocol expert for AXI, CXS, AHB, CHI. #J-18808-Ljbffr
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Key Details
- Date Posted: 25 Oct 2026
- Location: barcelona
- Employment Type: Permanent
- Workplace: On-site
- Category: Engineering
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Hireroo Ltd
Verified Healthcare EmployerVerified NHS trust or certified UK healthcare facility offering professional development and clinical governance.
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